1. Field of the Invention
The present invention relates to a demodulator of a digital modulation communication system, and more particularly to a phase tracking loop (PTL) circuit and a phase detecting method for detecting a phase of a signal received from the demodulator to perform a data communication using a digital vestigial sideband (VSB) modulation.
The present application for a demodulator of a digital modulation system, is based on Korean Application No. 9250/1995 which is incorporated herein by reference for all purposes.
2. Description of the Related Art
Since the advent of television, a realistic ambience, a large-sized screen and increased resolution have been sought. To achieve these ends, Japan is instituting the first high definition television (HDTV) broadcasting based on an analog transmission system. Such a system is called "Multiple Sub-Nyquist Sampling Encoding (MUSE)" transmission system. In the United States, a VSB transmission system. In the United States, a VSB modulation system has been proposed and adopted as a modulating method of a HDTV system by a GA (Grand Alliance) Committee. The VSB modulation system is used as a modulating technique of an analog video signal in conventional TV broadcasting, and utilized to transmit a digital modulation signal in GA-HDTV. In initial digital spectrum compatible (DSC) HDTV, 2-VSB and 4-VSB, respectively using 2 and 4 levels, are selected as the modulating method. In the GA HDTV, however, 8-VSB using 8 levels and 16-VSB using 16 levels applied to a high speed cable mode are selected as the modulating method. In order to demodulate VSB signals, the GA committee has proposed a schematic structure of a VSB receiver. The proposed VSB receiver of the HDTV has the following features. First, the proposed VSB receiver performs sampling by the unit of a symbol rate, unlike other demodulators of a digital modulating signal, by detecting data using only a signal of an I (in-phase) channel. Hence the VSB receiver has a simple structure in comparison with a quadrature amplitude modulation (QAM) receiver, for example, simultaneously using a Q (quadrature) channel. Furthermore, even though a processing speed is relatively lower than a fractional rate receiver, data detection is possible because the data is processed by the symbol rate.
The proposed VSB receiver uses synchronous coherent detection for demodulating a carrier wave from the receiver to detect digital data from a modulating signal. Although the synchronous coherent detection has an advantage in that it is possible to detect data with a lower error rate than asynchronous coherent detection at the same signal-to-noise ratio, the structure of the receiver is more complicated due to a carrier wave restoring circuit. Therefore, in order to detect a phase of a transmitting signal for the synchronous coherent detection, the proposed VSB receiver is constructed with 2 stages using a frequency and phase locked loop (FPLL) and a phase tracker.
The FPLL estimates the phase of the transmitting signal using a pilot signal contained in the VSB signal. The FPLL can be easily constructed by a frequency error detecting circuit of a conventional phase locked loop (PLL) and is disclosed in GA HDTV system specifications. An output of the FPLL is supplied to an input of a PTL circuit after passing through a channel equalizer. The PTL circuit eliminates the noise of a phase which is not eliminated in the FPLL, that is, a phase error. The PTL circuit of the GA HDTV receiver is not very different in structure from a decision directed carrier recovery (DDCR) circuit. However, the PTL circuit compensates for an error value of the phase after estimating a rotary component of signal points using sampled data of an input I channel. Information to be actually transmitted is contained in data of the I channel. Although the Q channel does not have an actual information transmitting function, it reduces the spectrum of a modulating signal. If there is a phase error during demodulation, a signal of the Q channel as well as data of the I channel is contained in the sampling data of the I channel. Accordingly, information of the Q channel is also needed to correct the phase error of the PTL circuit. The information of the Q channel can easily be obtained by filtering the data of the I channel by a Hilbert transform filter.
FIG. 1 shows a GA HDTV receiver proposed as a standard system by the GA committee. A schematic operation of a VSB receiver shown in FIG. 1 is disclosed in a collection of papers of a synthetic science meeting of The Korea Telecommunications Society, of Autumn 1994, entitled "DESIGN AND PERFORMANCE ANALYSIS OF A PHASE TRACKER FOR A SYNCHRONOUS VSB RECEIVER".
Referring to FIG. 1, the operation of the VSB receiver proposed by the GA committee will be explained hereinafter. First, a signal received from an antenna is supplied to a tuner 10. An equivalent band-pass VSB signal y(t) of an output signal generated from the tuner 10 can be represented by the following equation (1): EQU y(t)=.chi.(t).sup.j.omega..sbsp.c.sup.t+.theta.(t) (1)
where .omega..sub.c is a frequency of a carrier wave, .theta.(t) is a phase of the carrier wave, and .chi.(t) is a complex low-pass filtering signal. .chi.(t) consists of a real number component and an imaginary number component, and can be represented by the following equation (2): EQU .chi.(t)=.chi..sub.y (t)+j.chi..sub.i (t) (2)
A FPLL 20 restores a carrier wave e.sup.j.omega..sbsp.c.sup.t using a pilot signal contained in the equivalent band-pass VSB signal outputted from the tuner 10. The FPLL 20 multiplies the carrier wave e.sup.j.omega..sbsp.c.sup.t by the equivalent band-pass VSB signal and converts the multiplied signal to a baseband signal. The converted signal is expressed as the following equation (3): EQU i(t)=.chi..sub.y (t) cos (.theta.[n])-.chi..sub.i (t) sin (.theta.[n]) (3)
A Q channel component is given by: EQU q(t)=.chi..sub.y (t) sin (.theta.[n])+.chi..sub.i cos (.theta.[n]) (4)
In the above equations (3) and (4), .theta.[n] is a phase error value estimated by the FPLL 20. There is a vestigial phase component caused by a phase error between the carrier wave of a received signal and the restored carrier wave. The vestigial phase component distorts a demodulating signal. In the VSB receiver proposed by the GA committee, only a signal of the I channel is used. A symbol timing recovery circuit (STR) 40 receives the output signal i(t) of the FPLL 20 and restores symbol timing to control the operation timing of an analog-to-digital (A/D) converter 30. The A/D converter 30 converts the output signal i(t) of the FPLL 20 to a digital signal I[nt] according to a symbol interval rate under the control of the STR 40. The digital signal I[nT] is supplied through an equalizer 50 to a PTL 60. An output of the equalizer 50 can be given by the following equation (5) [in the above equations N indicates a fixed number]: EQU I[nT]e.sup.jw.sbsp.c.sup.[nT] =I[n]e.sup.jw.sbsp.c.sup.[n] =.chi..sub.y [n] cos (.theta.[n])-.chi..sub.i [n] sin(.theta.[n]) (5)
where it can be assumed that a variation in .theta. (hereinafter [n] is omitted to simplify the description) is sufficiently slow. Therefore, .theta.[n] has a constant value during a few symbol time. The equation (5) shows an I phase component of a signal demodulated to the carrier wave in which the phase error is .theta.[n]. This signal is supplied to the PTL 60 through the equalizer 50. The PTL 60 estimates the phase error .theta. to compensate for this value.
In the VSB modulation system, since .chi..sub.y and .chi..sub.i have non-zero values, the phase error .theta. can not be estimated only by the I channel signal expressed by the equation (5). Hence, a Q channel signal is needed to estimate the phase error .theta.. However, since the I channel signal is used as an input of the PTL 60, the PTL 60 estimates the Q channel component of the equation (4) from the I channel component signal through a digital filter.
FIG. 2 shows a block diagram of the PTL 60 according to the prior art. A digital filter 63, a Hilbert transform filter, digital-filters I data generated from a multiplier 61 to generate a restored signal Q' of the Q signal. The relationship between the I channel component and the Q channel component of an actual low-pass VSB signal is as follows: EQU .chi..sub.y * h.sub.vbs =.chi..sub.i (6)
where h.sub.vsb is equal to a response to a Hilbert transformer and a high-pass filter which are serially connected. The high-pass filter causes a vestigial sideband to exist in the spectrum of the VSB modulating signal. In the spectrum of the VSB signal adopted in the GA HDTV, the vestigial sideband is 0.31 MHz, and a band at a baseband of the VSB signal is 5.59 MHz. It is therefore apparent that the vestigial sideband occupies a very minute region. It is judged that there is no great error even though the spectrum of the VSB signal approximates the spectrum of a single sideband (SSB) signal. In such a case, h.sub.vsb approximates a Hilbert transform h.sub.H. Since the Hilbert transform phase-shifts a signal by 90.degree., the relationship between .chi..sub.y and .chi..sub.i is as follows: EQU .chi..sub.y * h.sub.H =.chi..sub.i (7) EQU .chi..sub.i * h.sub.H =-.chi..sub.y (8)
If a variation in the I signal of the equation (5) is very slow relative to a variation in .theta., the following equations are satisfied: EQU .chi..sub.y cos .theta.* h.sub.H =.chi..sub.i cos .theta. (9) EQU .chi..sub.i sin .theta.* h.sub.H =-.chi..sub.y sin .theta. (10)
Consequently, the following result is obtained: EQU I * h.sub.H =.chi..sub.i cos .theta.+.chi..sub.y sin .theta.=Q (11)
In the phase detecting structure of the PTL 60, the relationship between an actually transmitted signal .chi..sub.y +j.chi..sub.i and a signal I+jQ containing the phase error is as follows: EQU (.chi..sub.y +j.chi..sub.i)e.sup..omega..sbsp.c =I+jQ (12)
When expanding the above equation (12) for .theta.[n], then ##EQU1## In the above equation (13), when expanding only an imaginary part, then ##EQU2## If .theta. is small, the phase error is given by: ##EQU3## However, since a receiving side does not know real values of .chi..sub.y and .chi..sub.i, an estimated value is used.
That is, in the equation (15), if .theta. is small, the I channel signal approximates to a value of .chi..sub.y. Hence, the I channel signal is used as the estimated value of .chi..sub.y. When squaring and adding the equations (5) and (11), then EQU I.sup.2 +Q.sup.2 =.chi..sub.y.sup.2 +.chi..sub.i.sup.2 (16)
The estimated value .chi..sub.i of .chi..sub.i is obtained by the following equation (17): EQU .chi..sub.i =.+-..sqroot.I.sup.2 +Q.sup.2 -.chi..sub.y (17)
From the equation (17), if .theta. is small, since Q approximates to .chi..sub.i, .chi..sub.i is selected so as to have the same sign as the Q. That is, EQU .chi..sub.y =I (18) EQU I.sub.i =sgn(Q) * .sqroot.I.sup.2 +Q.sup.2 -.chi..sub.y (19)
The expression of the phase error becomes the equation (15). A phase error signal is obtained using the equation (15) and accumulated in an accumulator 67. A sine and cosine table ROM (read-only memory) 68 supplies sine and cosine values corresponding to an average value of the accumulated phase error signal to a complex multiplier 65 and eliminates a vestigial phase component by repeating the above process. The most important factor determining the performance of the PTL 60 is a method for detecting a phase difference between the input signal and the output signal of the PTL 60.
The above-described phase tracking loop circuit has a shortcoming in that there is an untrue assumption in the phase detecting algorithm. Moreover, since only the I value is used to determine .chi..sub.y, a linear operating range of phase detection is limited according to a determined error, resulting in performance deterioration. Further, although an accumulation limited value is multiplied by the input signal (i.e., the I data) to compensate for amplitude distortion caused by the vestigial phase, the amplitude compensation incorporates a delay for an actual error due to the delay of the digital filter 63.
An example of another phase tracking loop circuit for overcoming these problems is disclosed in Korea Patent Application No. 95-5265, assigned to the same assignee as the present invention. In the above Patent Application No. 95-5265, the phase error is detected by the following equations (20) and (21). FIG. 3 is a scattering line diagram for an input signal of the phase tracking loop circuit disclosed in the above Patent Application No. 95-5265. ##EQU4## EQU I.sub.e =I"-I (21)
Whereas only I" is used to obtain I.sub.c in FIG. 2, the above Patent Application No. 95-5265 uses I" and Q" as shown in FIG. 3. That is, I.sub.c is determined by calculating a slope indicated by an oblique line. While a fixed determining region is apt to make a wrong decision at a small vestigial phase error, a determining error can be reduced with an adaptive determining region by obtaining the slope at a given number of data.
However, the above-described phase detecting method and phase tracking loop circuit still have a disadvantage in that the digital filter for estimating the Q value should be accurate since the Q value has an important role in detecting the phase error as expressed by the equations (19) and (20). Further, since a construction or algorithm for processing ATAN etc. should be added, the system is complicated.